Impedance: input impedance of the device under test (DUT) you are connecting the 3x25 awg to.
Stable Synch: ensure stability and phase correction between "signal" and "synch" output. more info in Stable Synchronization and In-Synch Signal
Force Clock: force generator to use clock info and number of wave points from the wave file (input) to be feed to 3x25
Signal Boost: try to boost attenuated / downsampled output before sending to awg
Flatness Ctrl: control to limit the wave parameters (amplitude, offset and frequency) according to the signal profile and Flatness Bandwidth setting
Flatness BW: maximum allowable frequency to ensure signal flatness (if Flatness BW is On). more info Flatness Control and Bandwidth Limitation
Phase Profile: click to choose "phase profile" csv file to be used for Stable Synch and phase correction. more on Phase Profile Concept and File Format
Signal Profile: click to choose "signal profile" csv file to be used for Flatness Control and Bandwidth. more on Signal Profile Concept and File Format
Lock Parm: use value in parameter window for all wave key/shape.


A) in any possible events, the controller will try to use the original data from wave file as is if force clock setting is enabled, hence ignoring frequency value in wave parameter setting. however, if the clock (sampling rate) value set in the file exceeding the upper and lower limit of 3x25 sampling capability, the program will:

1) Signal Boost Off: round off the clock value to the limit (2K-200MS/s), but retaining every points in the file (up to 4096 points limit). hence your signal will become slower or faster.
2) Signal Boost On: resample data points to match data speed. eg: in csv file #CLOCK=400e6, #SIZE=100. program will round off the clock to 200MHz and downsample the data into 50 data points. or eg #CLOCK=1024, #SIZE=100  program will round off the clock to 2KHz and upsample the data into 200 data points. hence maintaining data speed, as opposed to maintaining data point count in Signal Boost Off setting.

B) if the Force Clock is enabled, Stable Synch will be disabled and vice versa.
C) since frequency setting is ignored in Force Clock mode, Sweep (varying frequency) mode will be unable to work, hence disabled.








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